I was under the impression the others hadn't quite caught up but were stuck at 14nm and 16nm. Are you saying the nm claims are wrong or is there somthing more complex here in the industry I'm missing? Sorry, I'm not a hardware guy and have lots to learn in the area.
Also not a hardware guy, but the issue seems to revolve around density, intel puts transistors on a chip "like this" the other guys do it "l i k e t h i s". They can make small things, but haven't worked out how to really pack them in next to each other and work reliably.
This isn't really true, there's a lot of marketing misinformation on both sides. Both with Intel and with TSMC/Samsung/GloFo.
The thing is that with "14nm/16nm", the front end of the line (FEOL) was with FinFETs at a "true' 14/16nm density, but the backend of the line (BEOL) and interconnects were at the older node.
But this doesn't necessarily mean that Intel has a moral high ground here, since they've had a lower than industry standard density from "32nm" and "40nm" and below.
TL;DR: "nm" node names are basically useless now, just know that TSMC 10nm isn't a production node and TSMC "7nm" ~= Intel "10nm"
